Поставка оригинальных MC100EP29DTG, Логика - Триггеры, от ON Semiconductor

The MC10/100EP29 is a dual master−slave flip−flop.
The device features fully differential Data and Clock inputs as well as outputs.
The MC10/100EP29 is functionally equivalent to the MC10/100EL29. Data enters the master latch when the clock is LOW and transfers to the slave upon a positive transition on the clock input.
Features
• Maximum Frequency > 3 GHz Typical
• 500 ps Typical Propagation Delays
• PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V
• NECL Mode Operating Range: VCC = 0 V with VEE = −3.0 V to −5.5 V
• Open Input Default State
• Safety Clamp on Inputs
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These are Pb−Free Devices